Computer_organization_ch4_processor_part1

Summary

Projects & Seminars, ETH Zürich, Fall 2022 Data-Centric Architectures: Fundamentally Improving Performance and Energy ... CPE 551 Ch4-Processor- Part1 Advanced Computer Architecture. Instruction Execution PC → instruction memory, fetch instruction Register numbers register file, read registers Depending on Structure Hazards Conflict for use of a resource In MIPS pipeline with a single memory . Load/store requires data access - Instruction Register: stores data in a circuit Uses a clock signal to determine when to update the stored value Edge-triggered: update when Clk introduction 0:00 The Two Classes of Computer Architectures 00:11:50 Datapath Elements (1) 00:16:55 Datapath Elements (2) ... Pipelining Analogy Pipelined laundry: overlapping execution . Parallelism improves performance ... Floating-Point Addition Now consider a 4-digit binary example ...